1. Field of the Invention
The present invention relates to a data transfer system for transferring digital audio data or the like that time-sequentially varies at a predetermined period via a communication network. More particularly, the present invention relates to a data transfer system designed such that a receiving node can correctly restore original data maintaining the state of time-sequence without using a separate sync signal line.
2. Description of Related Art
The network-based data transfer systems are generally classified into synchronous data transfer and asynchronous data transfer. Generally, in the synchronous data transfer, a separate sync signal line is provided between a transmitting node and a receiving node, and data is transmitted in synchronization with the sync signal, allowing the receiving node to correctly restore the original data. Therefore, the synchronous data transfer is suitable for transmission of digital audio data or the like that require the correct restoration of a position along a time axis (hereafter, referred to as "time position"). However, the synchronous transmission requires a separate sync signal line in addition to a data line, and a device for controlling synchronization between the transmitting and receiving nodes. In addition, during the synchronous communication, the line is occupied by the transmitting and receiving nodes, thereby lacking general versatility as a communication method.
On the other hand, the asynchronous transmission requires no separate sync signal line, and is therefore suitable for applications in the transmission of character data and still-picture data treated by personal computers, for example. However, a packet transmission used in the asynchronous method loses the information of time position inherent to data, making it unsuitable for the transmission of digital audio data.
To overcome these problems, a pseudo synchronous method has recently come to be used, in which each of the nodes in a network has separately a clock oscillator for generating an internal clock and a clock counter for counting the clock generated by the clock oscillator. A transmitting node attaches time data in the form of a time stamp to a head of a data packet for transmission to the network. On the other hand, the receiving node compares the time data with a time count produced by the internal counter. If an error is found therebetween, the receiving node adjusts the time count by the time data to thereby sequentially restore, based on the adjusted time count, the data transmitted from the transmitting node. Such a pseudo synchronous transmission method is specified in IEEE1394, for example.
However, in the above-mentioned pseudo synchronous transmission, the individual clock oscillators of the nodes involved in the network do not always oscillate exactly at the same frequency, causing an error to some extent. The deviation in oscillation between the transmitting and receiving nodes caused by this error is removed by correcting the time count of the clock counter of the receiving node with reference to the time data provided from the transmitting node at every synchronous timing, or every time the time data is received. This transmission method is practiced on the basis of a rule that inhibits reverse counting of time in the negative direction, and that allows double counting of the same value and forward skip counting in the positive direction for adjustment. Based on the adjustment rule, normally the receiving node can correctly restore the time-sequential arrangement of the original digital audio data or the like according to the time data transmitted from the transmitting node along with the digital audio data.
However, when the time count skips in the positive direction, the data incidentally received at the skipped timing may not be restored. Even worse, if the data received at the skipped timing is a time stamp, the packet data following this time stamp may not be restored correctly. In addition, since the above-mentioned rule allows the time count to skip in the positive direction, the clock generating circuit becomes complex in construction.